Type Here to Get Search Results !

Computer Organization & Architecture MCQ [ Set - 18 ] | Computer Organization and Architecture Mcq for Competitive Exams

 

Computer Organization and Architecture Mcq for Competitive Exams


Table of Content (toc)


1. When the value 37H is divide by 17H, the remainder is

    C0 H
    03 H
    07 H
ANSWER= (A) 09 H

 

2. If negative numbers are stored in 2's complemented form, the range of numbers that can be stored in 8 bits is

    -128 to-128
    -128 to 127
    -127 to-128
ANSWER= (B) -128 to 127

 

3. The addressing mode used in an instruction of the form ADD X, Y, is

     Absolute
    Immediate
    Indirect
ANSWER= (A) Absolute

 

4. A combinational logic circuit which sends data coming from a single source to twoor more separate destinations is

    Decoder.
    Encoder.
    Multiplexer.

ANSWER= (D) Demultiplexer.

 

5. The three main components of a digital computer system are

     Memory, IO, DMA 
    ALU, CPU, Memory
    CPU, Memory, 10

ANSWER= (C) CPU, Memory, 10

 

6.  The performance of cache memory is frequently measured in terms of a quantity called

    Miss ratio.
    Hit ratio.
     Latency ratio.
ANSWER= (C) Latency ratio.

 

7. A Stack-organised Computer uses instruction of

    Indirect addressing
     Two-addressing
    Zero addressing

ANSWER= (C) Zero addressing

 

8. The cost of storing a bit is minimum in

     Cache memory
    Register
    RAM
ANSWER= (D) Tape

 

9. The functional capacity of SSI devices is

    1-11 gates
    12 to 99 gates
    100 to 10,000 gates
ANSWER= (A) 1-11 gates

 

10. The idea of cache memory is based ______.

    on the property of locality of reference
    on the heuristic 90-10 rule
    on the fact that references generally tend to cluster
ANSWER= (A) on the property of locality of reference

 

11. Which of the following statement(s) is true? 

     ROM is a read/write memory
    PC points to the last instruction that was executed 
     Stack works on the principle of LIFO
ANSWER= (A) (C) & (D)

 

12. What characteristic of RAM memory makes it not suitable for permanentstorage?

    too slow
    unreliable
     it is volatile
ANSWER= (C) it is volatile

 

13. A resolution of _____ pixels will produce sharper image than 640 x 480 pixels.

    800 x 600
    1024 x 800
    1024 x 640
ANSWER= (D) 1024 x 768

 

14. Tera is 2 to the power of

    9



ANSWER= (D) 40

 

15.  ___ units are generally floating-point units that are completely pipelined.

    Scalar registers
    Vector load and store unit
    Vector functional unit
ANSWER= (C) Vector functional unit

 

16. 2n-1 is the largest integer in 2's complement representation using n bits.

10 The least negative value that the product of two 8-bit two's complement numbers can take is

    -214
    -215
    -210
ANSWER= (B) -215

 

17. In immediate addressing the operand is placed

     in the CPU register
    after OP code in the instruction
     in memory
ANSWER= (B) after OP code in the instruction

 

18. Data input command is just the opposite of a

    Test command
    Control command
    Data output
ANSWER= (C) Data output

 

19. PSW is saved in stack when there is a _____.

    interrupt recognized
    execution of RST instruction
    Execution of CALL instruction
ANSWER= (A) interrupt recognized

 

20. In register addressing mode operands are looked at

    In cache
    In secondary storage
     In CPU

ANSWER= (C) In CPU

 

21. Computers use addressing mode techniques for ____________.

    giving programming versatility to the user by providing facilities as pointers to memory counters for loop control
     to reduce no. of bits in the field of instruction
    specifying rules for modifying or interpreting address field of the instruction
ANSWER= (D) All the above

 

22. The shift left and shift right functions operate on the value in the

    ACCUM
    AREG
    BASIC
ANSWER= (A) ACCUM

 

23. Which of the following comment about the program counter is true? 

    It is used to count the no. of instructions
    It is a cell in ROM 
    During execution of the current instruction, its content changes
ANSWER= (C) During execution of the current instruction, its content changes

 

24.  ___ is an operation that fetches the non-zero elements of a sparse vector from memory.

     Strip mining
    ETA-10
    Scatter
ANSWER= (D) Gather

 

25. The master indicates that the address is loaded onto the BUS, by activating signal.

     MSYN
     SSYN
    WMFC
ANSWER= (A)  MSYN

 

26. The numbers in the range -23 to +31 is represented by the minimum number of bits :





ANSWER= (A) 6

 

27.  The speed imbalance between memory access & CPU operation can be reduced by -




ANSWER= (B) memory interleaving

 

28. The sequence of events that happen during a typical fetch operation is

    PC MDR-Memory →IR 
    PC-MAR-Memory-MDR→IR 
    PC Memory-IR
ANSWER= (B) PC-MAR-Memory-MDR→IR 

 

29. The circuit converting binary data in to decimal is_____.

     Encoder
    Multiplexer
    Decoder
ANSWER= (D) Code converter

 

30. BCD stands for

    Boolean code definition
    Binary coded division
    Binary coded decimal
ANSWER= (C) Binary coded decimal



Previous(demo)                                                                                                                        Next(demo)
                                                                                                                                            




Computer Organization & Architecture MCQ Set -3(link)











Friends if you like this post,kindly comment bellow and do share your responce.Thank You for Visiting.

Post a Comment

0 Comments
* Please Don't Spam Here. All the Comments are Reviewed by Admin.

Top Post Ad

Below Post Ad