1. In half subtractor borrow is obtained by (for inputs A & B)
-
AB
A’B
A’B’
2.The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to ______.
-
the time its takes for the platter to make a full rotation
the time it takes for the read-write head to move into position over the appropriate track
the time it takes for the platter to rotate the correct sector under the head
3. CP/M
-
Was initially designed to be used by non-programmers
Became the standard programming language for personal computers
Is used to control a keyboard, CRT screen, and disks
4. The access time is maximum in
-
Cache memory
Register
RAM
5. The transmission on the asynchronous BUS is also called
-
Switch mode transmission
Variable transfer
Bulk transfer
6. 1. ___ is systems with multiple CPUs, which are capable of independently executing different tasks in parallel.
2. In this category every processor and memory module has a similar access time.
-
Multiprocessor, UMA
UMA, Microprocessor
Microprocessor, Multiprocessor
7. Explicit vector instructions were introduced with the appearance of ___.
-
Processors
Micro processor
Intel processors
8. The chip can be disabled or cut off from an external connection using
-
Chip select
LOCK
ACPT
9. The sum of two hexadecimal numbers 23D and 9AA gives the hexadecimal number
-
AF7
BF6
BE7
10.Giga is 2 to the power of -
11.The information available in a state table may be represented graphically in a
-
simple diagram.
state diagram.
complex diagram.
12. RAM is _______ and ______
-
Volatile, permanent
Nonvolatile, temporary
Nonvolatile, permanent
13. Which of the following register is loaded with the contents of the memory location pointed E the PC
-
Memory address registers
Memory data registers
Instruction register
14. ROM tells the computer to
-
Start up the operating system
Connect to the hardware
Turn on
15. The instruction ‘ORG O’ is a______.
-
Machine Instruction.
Pseudo instruction.
High level instruction.
16. Which of the following comment about the program counter is true?
-
It is used to count the number of instructions
It is a cell in ROM
During execution of the current instruction, its content changes
17. In computers, subtraction is carried out generally by____.
-
1's complement method
2's complement method
signed magnitude method
18. Which of the following is a unit of measurement with computer systems
-
Byte
Megabyte
Kilobyte
19. The speed imbalance between memory access & CPU operation can be reduced by
-
cache memory
memory interleaving
reducing memory size
20.Let X and Y be the input and Z be the output of the XOR gate, the value of the Z is given by :
-
X+Y
X.Y
(X.Y)’
21. The addressing mode used in an instruction of the form ADD X Y, is _____.
-
Absolute
indirect
index
22. The sequence of events that happen during a typical fetch operation is
-
PC → MDR→ Memory → IR
PCMAR-MEMORY MDR→IR
PC MEMORY IR
23. Punched-card equipment was first introduced in Britain in 1904 by a small company. What was the name of that company?
-
Accounting & Tabulating Corporation of Great Britain
International Business Machines (IBM)
Tabulator Machine company
24. Negative numbers cannot be represented in
-
Sign-magnitude form
1's complemented form
2's complemented form
25. _____ recognition can now open the computer world to those who may have been restricted due to a physical handicap.
-
Speech
Output
Vision
26. ___ is the logical structure of a computer’s Random-Access Memory (RAM).
-
Memory addressing
Operation field
Address field
27. The addressing mode used in an instruction of the form ADD X, Y is
-
absolute register
immediate
indirect
28. ___ is faster storage of copies of programs & data, which are ready for execution. The Cache is used to close up the speed gap between the Main memory and the ___.
-
Cache Memory, CPU
CPU, Cache Memory
Primary Memory, Cache Memory
29. Which of the following register is used in the control unit of the CPU to indicate the next instruction which is to be executed ?
-
Accumulator
Index register
Instruction decoder
30. The exponent of a floating point number is represented in excess-N code (biased) so that
- the dynamic range is large
the precision is high
the smallest number is represented by all zéroes
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