Table of Content (toc)
1. 15. An SIMD computer exploits ___ parallelism-
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Spatial
Temporal
Both a & b
2. The ‘T’ in the flip flop stands for ……………………..
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Time
Transfer
Toggle
3. The average time required to reach a storage location in memory and obtainits contents is called the _____.
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seek time
turnaround time
access time
4. The circuit used to store one bit of data is known as_______.
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Register
Encoder
Decoder
5. ___ the pipeline solution is considered attractive due to its simplicity for hardware and software.
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Instruction count – 0xFF01
Flush
Load-stall count – 0xFF02
6. Negative numbers cannot be represented in
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Sign-magnitude form
1's complemented form
2's complement form
7. Associate memory can be used to build ___ associative processors.
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SISD
SIMD
MISD
8. If a processor does not have any stack pointer register, then
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It cannot have subroutine call instruction
It can have subroutine call instruction, but no nested subroutine
Nested subroutine calls are possible, but interrupts are not
9. The addressing mode used in an instruction of the form ADD X.Y is
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absolute register
immediate
indirect
10. The example of implied addressing is
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Stack addressing
Immediate addressing
Indirect addressing
11. In which addressing mode the operand is given explicitly in the instruction
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Absolute.
Immediate .
Indirect.
12.Any instruction should have at least
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3 operands
2 operands
1 operand
13. A three input NOR gate gives logic high output only when_____.
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one input is high
one input is low
two input are low
14. In a half – adder, CARRY is obtained by using
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OR gate
NAND gate
AND gate
15. Which of the following rule(s) regarding the addition of 2 given numbers in 2's complement is correct.
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Add sign bit and discard carry, if any
Add sign bit and add carry, if any
don't Add sign bit and discard carry, if any
16. Using Binary division, divide 1011011 by 111
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101.01
1011
011.01
17. (2FAOC)16 is equivalent to _____.
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(195 084)10
(001011111010 0000 1100)2
Both A.and (B)
18. (2FAOC)16 is equivalent to _____.
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(195 084)10
(001011111010 0000 1100)2
Both A.and (B)
19. The ALU performs the indicated operation on the operands prepared in the prior cycle and store the result in the specified destination operand location.
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Fetch instruction
Decode instruction
Execute instruction
20. The exponent of a floating point number is represented in excess-N code (biased) so that
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the dynamic range is large
the precision is high
the smallest number is represented by all zeroes
21. There are ___ families of pipelined vector processors.
22. The ___ architecture of a processor often referred to as simply the architecture of the processor.
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Abstract
Concrete
Encapsulated
23. If negative numbers are stored in 2's complemented form, the range of numbers that can stored in 8 bits is
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-128 to +128
-128 to +127
-127 to +128
24. ___ Architecture supports the pipelined flow of vector operands directly from the memory to Pipelines and then back to the memory. ___ Architecture uses vector registers to interface between the memory and functional Pipelines.
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Memory –to-register, Register – to – Register
Memory –to-Memory, Register – to – Register
Memory –to-Pipelines, Register – to – Memory
25.Which of the architecture is power efficient?
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CISC
RISC
ISA
26. The largest integer that can be represented in signed-2's complement representation using n bits is
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2n-1
2n
2n-1-1
27. A stack organized computer has
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Three-address Instruction.
Two-address Instruction.
One-address Instruction.
28. The three main components of a digital computer system are
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Memory, 10, DMA
ALU.CPU,Memory
CPU, Memory, 10.
29. If the radix point (binary point) is fixed and assumed to be on the right of the rightmost digit, the representation of such a number is called
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Fixed point
Floating point
Radix point
30. _________ register keeps tracks of the instructions stored in program storedin memory.
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AR (Address Register)
XR (Index Register)
PC (Program Counter)
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