Table of Content (toc)
1. Registers are
-
Part of CPU
Part of main memory
Part of input output
2. Which of the following is lowest in memory hierarchy?
-
Cache memory
Secondary memory
Registers
3. Which of the following units can be used to measure the speed of a computer
-
SYPS
MIPS
BAUD
4. The operation which commutative but not associative is
-
AND
OR
XOR
5. Which of the following interrupt is non maskable
-
INTR.
RST 7.5.
RST 6.5.
6. Execution time of any condition instruction is
-
fixed
variable
any one of two specified value
7. The sequence of events that happen during a typical fetch operation is
-
PC - MDR - Memory - IR
PC - MAR - MEMORY - MDR - IR
PC MEMORY - IR
8. n bits in operation code imply that there are ___________ possible distinctoperators.
-
2n
2n
n/2
9. Negative numbers cannot be represented in
-
Sign-magnitude form
1's complemented form
2's complemented form
10. The Sun micro systems processors usually follow architecture.
-
CISC
ISA
ULTRA SPARC
11. The exponent of a floating point number is represented in excess-N (biased exponent form) so that
-
the dynamic range is large
the precision is high
the smallest number is represented by all zeroes
12.One of the major difference between a combinational logic circuit such as a decoder and a storage circuit such as an RS latch is that
- The storage circuit requires a different class of gates.
The storage circuit requires a clock input.
The storage circuit uses feedback
13. _________ is a piece of hardware that executes a set of machine language instructions.
-
controller
bus
processor
14. If negative numbers are stored in 2's complemented form, the range of numbers that can be stored in 8 bits is
-
-128 to +128
-128 to +127
-127 to +128
15. ___ in a dataflow graph represent data paths.
-
Nodes
Sticky tokens
Edges
16. The addressing mode used in an instruction of the form ADD X, Y is
17.Any instruction should have at least
-
3 operands
2 operands
1 operand
18. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to
-
the time its takes for the platter to make a full rotation
the time it takes for the read-write head to move into position over the appropriate track
the time it takes for the platter to rotate the correct sector under the head
19. The approach where the memory contents are transferred directly to the processor from the memory is called
-
Read-later
Read-through
Early-start
20. In immediate addressing the operand is placed -
-
in the CPU register
after OP code in the instruction
in memory
21. The multiplicand register & multiplier register of a hardware circuit implementing booth's algorithm have (11101) & (1100). The result shall be
-
(812) 10
(-12) 10
(12) 10
22. Instruction in computer languages consists of -
-
OPCODE
OPERAND
Both of above
23. The proper definition of a modern digital computer is
-
A machine that works on binary code
Any machine that can perform mathematical operations
A more sophisticated and modified electronic packet calculator
24. The instruction queue is ___ storage area-
-
FIFO
LIFO
FILO
25. Which of the following registers is loaded with the contents of the memory location pointed by the PC? -
-
Memory address registers
Memory data registers
Instruction register
26. The multiplicand register & multiplier register of a hardware circuitimplementing booth's algorithm have (11101) & (1100). The result shall be ______.
-
(812)10
(-12)10
(12)10
27. A Stack-organized Computer uses instruction of
-
Indirect addressing
Two-addressing
Zero addressing
28. _____ have the advantage of a drawing directly onto the screen, but this can become uncomfortable, and they are not accurate.
-
Monitor
Keyboard
Light pen
29. In immediate addressing the operand is placed -
-
in the CPU register
as a part of the instruction
as not a part of the instruction
30. Which of the following is not a weighted code ?
-
Decimal Number system
Excess 3-cod
Binary number System
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