Computer Organization & Architecture MCQ [ Set - 8 ] | Computer Organization Architecture mcq

 

   Table of Content (toc)

1.  Registers are 

A)  Part of CPU
B)  Part of main memory
C) Part of input output
D)  None of the above

ANSWER= (A) Part of CPU

 

2. Which of the following is lowest in memory hierarchy?

A) Cache memory
B) Secondary memory
C) Registers
D) RAM

ANSWER= (B) Secondary memory

 

3. Which of the following units can be used to measure the speed of a computer

A) SYPS
B) MIPS
C) BAUD
D) none of the above

ANSWER= (B)MIPS

 

4. The operation which commutative but not associative is

A) AND
B) OR
C) XOR
D)  NAND

ANSWER= (D) NAND

 

5. Which of the following interrupt is non maskable

A) INTR.
B) RST 7.5.
C) RST 6.5.
D) TRAP.

ANSWER= (A) TRAP.

 

6. Execution time of any condition instruction is

A) fixed
B) variable
C)  any one of two specified value
D)  none of the above

ANSWER= (A) fixed

 

7. The sequence of events that happen during a typical fetch operation is

A) PC - MDR - Memory - IR
B) PC - MAR - MEMORY - MDR - IR
C) PC MEMORY - IR 
D) MAR - MDR - IR

ANSWER= (B) PC - MAR - MEMORY - MDR - IR

 

8. n bits in operation code imply that there are ___________ possible distinctoperators.

A) 2n
B) 2n
C)  n/2
D) 2n

ANSWER= (B) 2n

 

9. Negative numbers cannot be represented in

A) Sign-magnitude form 
B) 1's complemented form
C) 2's complemented form
D) none of the above

ANSWER= (D) none of the above

 

10. The Sun micro systems processors usually follow architecture.

A)  CISC
B) ISA
C) ULTRA SPARC
D) RISC

ANSWER= (D) RISC

 

11. The exponent of a floating point number is represented in excess-N (biased exponent form) so that

A) the dynamic range is large
B) the precision is high
C)  the smallest number is represented by all zeroes
D) overflow is avoided

ANSWER= (C)  the smallest number is represented by all zeroes

 

12.One of the major difference between a combinational logic circuit such as a decoder and a storage circuit such as an RS latch is that

A) The storage circuit requires a different class of gates.
B) The storage circuit requires a clock input.
C) The storage circuit uses feedback
D) The storage circuit has no propagation delay

ANSWER= (B) The storage circuit requires a clock input.

 

13. _________ is a piece of hardware that executes a set of machine language instructions.

A) controller
B) bus
C) processor
D)  motherboard

ANSWER= (C) processor

 

14. If negative numbers are stored in 2's complemented form, the range of numbers that can be stored in 8 bits is 

A) -128 to +128 
B) -128 to +127 
C) -127 to +128 
D) -127 to +127

ANSWER= (B)  -128 to +127 

 

15. ___ in a dataflow graph represent data paths.

A) Nodes
B) Sticky tokens
C)  Edges
D) Data links

ANSWER= (C) Edges

 

16. The addressing mode used in an instruction of the form ADD X, Y is

A) absolute register
B) immediate
C) Tindirect
D) index

ANSWER= (D) index

 

17.Any instruction should have at least 

A) 3 operands 
B)  2 operands
C) 1 operand
D)  none of the above

ANSWER= (D)  none of the above

 

18.  The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to

A) the time its takes for the platter to make a full rotation
B)  the time it takes for the read-write head to move into position over the appropriate track
C)  the time it takes for the platter to rotate the correct sector under the head
D) none of the above

ANSWER= (A) the time its takes for the platter to make a full rotation

 

19. The approach where the memory contents are transferred directly to the processor from the memory is called              

A) Read-later
B)  Read-through
C) Early-start
D)  None of the mentioned

ANSWER= (C) Early-start

 

20. In immediate addressing the operand is placed - 

A) in the CPU register
B) after OP code in the instruction
C) in memory 
D) in stack

ANSWER= (B)  after OP code in the instruction

 

21. The multiplicand register & multiplier register of a hardware circuit implementing booth's algorithm have (11101) & (1100). The result shall be

A) (812) 10
B) (-12) 10
C) (12) 10
D) (-812) 10

ANSWER= (A) (812) 10

 

22. Instruction in computer languages consists of - 

A) OPCODE 
B) OPERAND
C) Both of above
D) None of the above

ANSWER= (C) Both of above

 

23. The proper definition of a modern digital computer is

A) A machine that works on binary code
B) Any machine that can perform mathematical operations
C) A more sophisticated and modified electronic packet calculator
D) An electronic automated machine that can solve problems involving words and numbers

ANSWER= (A) An electronic automated machine that can solve problems involving words and numbers

 

24. The instruction queue is ___ storage area-

A) FIFO
B) LIFO
C) FILO
D) All of the above

ANSWER= (A)  FIFO

 

25. Which of the following registers is loaded with the contents of the memory location pointed by the PC? - 

A) Memory address registers
B)  Memory data registers
C) Instruction register
D) Program counter

ANSWER= (C) Instruction register

 

26. The multiplicand register & multiplier register of a hardware circuitimplementing booth's algorithm have (11101) & (1100). The result shall be ______.

A) (812)10
B)  (-12)10
C) (12)10
D) (-812)10

ANSWER= (A) (812)10

 

27. A Stack-organized Computer uses instruction of

A) Indirect addressing
B) Two-addressing
C) Zero addressing
D) Index

ANSWER= (C) Zero addressing

 

28. _____ have the advantage of a drawing directly onto the screen, but this can become uncomfortable, and they are not accurate.

A) Monitor
B)  Keyboard
C) Light pen
D) Mouse

ANSWER= (C) Light pen

 

29. In immediate addressing the operand is placed -

A) in the CPU register
B) as a part of the instruction 
C)  as not a part of the instruction
D)  in stack

ANSWER= (B) as a part of the instruction 

 

30. Which of the following is not a weighted code ?

A) Decimal Number system
B) Excess 3-cod
C) Binary number System
D) None of these

ANSWER= (B) Excess 3-cod

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