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Computer Organization & Architecture MCQ [ Set - 5 ] | Computer Organization and Architecture Mcqs pdf

computer organization and architecture mcqs pdf

 Table of Content (toc)

1. Instruction cycle is

    decode fetch execution

ANSWER= (A)  fetch-decode-execution 


2. In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective address is             

    EA = 5+R1
    EA = R1
    EA = [R1]
ANSWER= (D) EA = 5+[R1]


3.  The instructions which copy information from one location to another either in theprocessor’s internal register set or in the external main memory are called

    Data transfer instructions.
     Program control instructions.
    Input-output instructions.
ANSWER= (A) Data transfer instructions.


4. A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) an address part (allowing for only one address). Each instruction is



5. In dynamic scheduling, the hardware ___ the instruction execution to reduce stalling of the pipeline.


ANSWER= (A) Rearranges


6.Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?

    1 Megabyte/sec
    4 Megabytes/sec
     8 Megabytes/sec
ANSWER= (D) 2 Megabytes/sec


7. Micro instructions are kept in

    Main memory
    Control Memory
    Cache Memory
ANSWER= (A) Types 2nd options


8.  At the system level the description of the ___ architecture is based on processor level building blocks.

ANSWER= (B) Concrete


9. Which Logic circuit would you use for addressing memory ?

    Full adder
ANSWER= (C) Decoder


10. Booth’s algorithm is used in floating-point

ANSWER= (C) multiplication


11. Normally digital computers are based on

     AND and OR gates
    NAND and NOR gates
    NOT gate
ANSWER= (B) NAND and NOR gates


12. Which of the following addressing modes is used in the instruction PUSH B ?

ANSWER= (B) Register


13. Which of the following addressing modes is used in instruction RAL

ANSWER= (B) implied


14. Octal number system is

    A positional system with weights 0 to 9
    A positional system with weights 0 to 8
    A positional system with weights 0 to 7

ANSWER= (C) A positional system with weights 0 to 7


15. Address mode is_______

    explicitly specified
    implied by the instruction
    both a and b
ANSWER= (C) both a and b


16. Which of the following affects processing power ?

    data bus capacity
     addressing scheme
     clock speed
ANSWER= (D) all of the above


17. Which of the following address modes is used in the instruction 'POP B' ? 

ANSWER= (D) register indirect


18. In an instruction the address part points to the address of actual data. The addressing mode is

     immediate addressing
    direct addressing
     indirect addressing
ANSWER= (B) direct addressing


19. The main computer that stores files that can be sent to computers that are networked together is

    Clip art
ANSWER= (D)  File server


20. A computer uses words of size 32-bit. The instruction

     may or may not be one byte length
    must always be fetched in one cycle with 2 bytes in the cycle 
     must always be fetched in two cycles with one byte in each cycle

ANSWER= (C) must always be fetched in two cycles with one byte in each cycle


21. In daisy-chaining priority method, all the devices that can request an interrupt are connected in

ANSWER= (B) serial


22. The minterms corresponding to decimal number 15 is

ANSWER= (D) A’+B’+C’+D’


23. To What temporary area can you store and other data, later paste them to another location?

    The hard disk
ANSWER= (D) The clipboard


24. The CPI value for RISC processor is



25. A 32-bit-word computer can access

ANSWER= (D) 32


26. The 2s compliment form (Use 6 bit word) of the number 1010 is

ANSWER= (B) 110110.


27. In the processor, the address of the next instruction to be executed

    stack pointer register 
     index register 
    base register
ANSWER= (C) base register


28. The BSA instruction is______.

    Branch and store accumulator
    Branch and save return address
    Branch and shift address
ANSWER= (B) Branch and save return address


29. The most common storage device for the personal computer is

    Hard disk
     Zip disk
    USB thumb drive
ANSWER= (A) Hard disk


30. A stack-organised computer uses instruction of 

    Indirect addressing
    Two addressing
    Zero addressing
ANSWER= (C) Zero addressing

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Computer Organization & Architecture MCQ Set -3(link)

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